This invention relates to methods and systems for detecting and eliminating short circuit current paths in photovoltaic devices and can be employed in or with systems for the continuous production of photovoltaic devices wherein successive amorphous-silicon alloy semiconductor layers are continuously deposited on a substrate moving through each of a plurality of deposition chambers.
Recently, considerable efforts have been made to develop systems for depositing amorphous semiconductor alloys, each of which can encompass relatively large areas, and which can be doped to form p-type and n-type materials for the production of p-i-n and other type devices which are, in photovoltaic and other applications, substantially equivalent to their crystalline counterparts.
It is now possible to prepare amorphous silicon alloys by glow discharge and vapor deposition techniques that have (1) acceptable concentrations of localized states in the energy gaps thereof, and (2) provide high quality electronic properties. These techniques are fully described in U.S. Pat. No. 4,226,898, Amorphous Semiconductors Equivalent To Crystalline Semiconductors, issued in the names of Stanford R. Ovshinsky and Arun Madan on Oct. 7, 1980 and in U.S. Pat. No. 4,217,374, issued in the names of Stanford R. Ovshinsky and Masatsugu Izu on Aug. 12, 1980, under the same title. As disclosed in these patents, fluorine introduced into the amorphous silicon semiconductor operates to substantially reduce the density of the localized defect states therein and facilitates the addition of other alloying materials, such as germanium.
The concept of utilizing multiple cells, to enhance photovoltaic device efficiency, was discussed at least as early as 1955 by E. D. Jackson, U.S. Pat. No. 2,949,498 issued Aug. 16, 1960. The multiple cell structures therein described utilized p-n junction crystalline semiconductor devices. Essentially, the concept is directed to utilizing different band gap devices to more efficiently collect various portions of the solar spectrum and to increase open circuit voltage (Voc). The tandem cell device has two or more cells with the light directed serially through each cell, with a large band gap material followed by one or more smaller band gap materials to absorb the light passed through the preceeding cell or layer.
It is of great commercial importance to be able to mass produce photovoltaic devices. Unlike crystalline silicon which is limited to batch processing for the manufacture of solar cells, amorphous silicon alloys can now be deposited in multiple layers over large area substrates to form solar cells in a high volume, continuous processing system. Continuous processing systems of this kind are disclosed, for example, in pending patent applications: Ser. No. 151,301, filed May 19, 1980 (now U.S. Pat. No. 4,400,409, issued Aug. 23, 1983) for A Method Of Making P-Doped Silicon Films And Devices Made Therefrom; Ser. No. 244,386, filed Mar. 16, 1981 for Continuous Systems For Depositing Amorphous Semiconductor Material; Ser. No. 240,493, filed Mar. 16, 1981 (now U.S. Pat. No. 4,410,558, issued Oct. 18, 1983) for Continuous Amorphous Solar Cell Production System; Ser. No. 306,146, filed Sept. 28, 1981 for Multiple Chamber Deposition And Isolation System And Method; and Ser. No. 359,825, filed Mar. 19, 1982 for Method And Apparatus For Continuously Producing Tandem Amorphous Photovoltaic Cells. As disclosed in these applications, a substrate formed from stainless steel, for example, may be continuously advanced through a succession of deposition chambers, wherein each chamber is dedicated to the deposition of a specific material.
In making a solar cell of p-i-n type configuration, the first chamber is dedicated for depositing a p-type amorphous silicon alloy, the second chamber is dedicated for depositing an intrinsic amorphous silicon alloy, and the third chamber is dedicated for depositing an n-type amorphous silicon alloy. Since each deposited alloy, and especially the intrinsic alloy must be of high purity, the deposition environment in the intrinsic deposition chamber is isolated from the doping constituents within the other chambers to prevent the diffusion of doping constituents into the intrinsic chamber. In the previously mentioned patent applications, wherein the systems are primarily concerned with the production of photovoltaic cells, isolation between the chambers is accomplished by gas gates through which unidirectional gas flow is established and through which an inert gas may be "swept" about the web of substrate material.
In the previously mentioned patent applications, deposition of the amorphous silicon alloy materials onto the large area continuous substrate is accomplished by glow discharge decomposition of the process gases. Even though careful measures are taken to form devices having amorphous semiconductor alloys of high quality, there remains a finite probability that over a given device surface area, short circuit current paths through the amorphous semiconductor alloys can exist. These short circuit current paths are deleterious to obtaining optimum performance from the devices. The reason for the non-optimum performance is that such devices are customarily provided with a layer of transparent conductive material over the last deposited amorphous semiconductor layer to form a top contact of the device to permit collection of the photo generated charge carriers as electrical current, while permitting the light photon energy to pass therethrough into the active region or regions of the device for the generation of the charge carriers. Since this last layer is conductive, just one short circuit current path through the device can greatly limit the voltage obtainable over a rather large area of the device. Hence, device voltage output and efficiency can be substantially reduced by virtue of such short circuit current paths. It is to the detection and elimination of these short circuit current paths that the present invention is directed.
One attempt to eliminate short circuit current paths within photovoltaic devices involves the application of a reverse bias voltage to the device. The applied reverse bias causes large currents to flow through the short circuit current paths causing localized heating of the amorphous semiconductor. The localized heating crystallizes the amorphous semiconductor in the regions of the short circuit current paths to result in an increase in the resistivity of the paths. Unfortunately, this process has many limitations. While the path resistivity is increased, the resistivity of the crystallized regions remains less than the resistivity of the unheated amorphous semiconductor device areas. As a result, the short circuit current paths are not eliminated, but have their resistivity changed to a limited extent. Also, this method is not effective for eliminating short circuit current paths resulting from substrate surface irregularities which can be the most prevalent cause of short circuit current paths, especially in large area devices suitable for commercial applications or devices having a roughened substrate surface forming a diffuse back reflector.
The system and method of the present invention, in contrast, has been found to totally eliminate short circuit current paths in photovoltaic devices. In addition, the system and method of the present invention even eliminates substrate related short circuit current paths whether due to substrate irregularities or the presence of a roughened substrate surface to form a diffuse back reflector, such as disclosed in copending U.S. application Ser. No. 354,285, filed Mar. 3, 1982, (now U.S. Pat. No. 4,419,533, issued Dec. 6, 1983) for Improved Photovoltaic Device Having Incident Radiation Directing Means For Total Internal Reflection. Furthermore, the system and method of the present invention is directly applicable to continuous process manufacturing techniques including the continuous production of multiple cell devices.